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Digital Integrated Circuit Design Verification Engineer
Digital Integrated Circuit Design Verification EngineerSnap • Vancouver, Washington, USA
Digital Integrated Circuit Design Verification Engineer

Digital Integrated Circuit Design Verification Engineer

Snap • Vancouver, Washington, USA
[job_card.variable_days_ago]
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  • [job_card.full_time]
[job_card.job_description]

Snap Inc is a technology company. We believe the camera presents the greatest opportunity to improve the way people live and communicate. Snap contributes to human progress by empowering people to express themselves live in the moment learn about the world and have fun together. The Companys three core products are Snapchat a visual messaging app that enhances your relationships with friends family and the world; Lens Studio an augmented reality platform that powers AR across Snapchat and other services; and its AR glasses Spectacles .

Spectacles is home to our hardware products with a world-class research & development team. We are focused on pushing the boundaries of what a camera can be specifically overlaying computing on the real world. Next Generation Spectacles are our first pair of glasses that bring augmented reality to life.

Were looking for a Design Verification Engineer to join the Spectacles Team at Snap Inc!

What youll do :

Work as part of a multi-disciplinary team designing display Integrated Circuits for AR

Work closely with digital design analog logic software and verification engineers

Develop and implement UVM-based and assertion-based testbenches

Create and execute verification test plans including functional coverage and code coverage

Utilize Siemens Questa tool set for verification and debug tasks

Specify and configure tools and create automation

Knowledge Skills & Abilities :

Strong knowledge of UVM and SystemVerilog for advanced verification methodologies

Strong knowledge of digital functional simulation and tools such as Siemens Questa

Strong knowledge of good Verilog RTL coding practices

Scripting and automation such as TCL Make Perl Python and Shell scripts in Linux environment

Excellent written and verbal English communication

Minimum Qualifications :

BSEE or MSEE or relevant years of experience

10 years of experience in ASIC Design Verification

Preferred Qualifications :

Experience with entire verification process from planning to sign-off

Experience with Siemens UVM Framework

Experience in emulation

Experience in RTL design

Familiarity with video and display systems MIPI AMBA I2C SPI protocols and embedded microcontroller

Familiarity with ASIC test or production flow

Ideal candidate is a self-starter can organize complex issues and drive them to closure

Able to multitask and prioritize.

If you have a disability or special need that requires accommodation please dont be shy and provide us some information .

Default Together Policy at Snap : At Snap Inc. we believe that being together in person helps us build our culture faster reinforce our values and serve our community customers and partners better through dynamic collaboration. To reflect this we practice a default together approach and expect our team members to work in an office 4 days per week.

At Snap we believe that having a team of diverse backgrounds and voices working together will enable us to create innovative products that improve the way people live and communicate. Snap is proud to be an equal opportunity employer and committed to providing employment opportunities regardless of race religious creed color national origin ancestry physical disability mental disability medical condition genetic information marital status sex gender gender identity gender expression pregnancy childbirth and breastfeeding age sexual orientation military or veteran status or any other protected classification in accordance with applicable federal state and local laws. EOE including disability / vets.

We are an Equal Opportunity Employer and will consider qualified applicants with criminal histories in a manner consistent with applicable law (by example the requirements of the San Francisco Fair Chance Ordinance and the Los Angeles Fair Chance Initiative for Hiring where applicable).

Our Benefits : Snap Inc. is its own community so weve got your back! We do our best to make sure you and your loved ones have everything you need to be happy and healthy on your own terms. Our benefits are built around your needs and include paid parental leave comprehensive medical coverage emotional and mental health support programs and compensation packages that let you share in Snaps long-term success!

Compensation

In the United States work locations are assigned a pay zone which determines the salary range for the position. The successful candidates starting pay will be determined based on job-related skills experience qualifications work location and market conditions. The starting pay may be negotiable within the salary range for the position. These pay zones may be modified in the future.

Zone A (CA WA NYC) :

The base salary range for this position is $173000-$259000 annually.

Zone B :

The base salary range for this position is $164000-$246000 annually.

Zone C :

The base salary range for this position is $147000-$220000 annually.

This position is eligible for equity in the form of RSUs.

Key Skills

Arabic Speaking,Logistics Operations,Lecturing,Community Support,Gynaecology & Obstetrics,AC Maintenance

Employment Type : Full-Time

Experience : years

Vacancy : 1

Yearly Salary Salary : 164000 - 246000

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Design Verification Engineer • Vancouver, Washington, USA

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