Senior ASIC Verification Engineer

A company is looking for a Senior ASIC Verification Engineer.

Key Responsibilities :

Participate in ground up development of UVM environments to verify RTL at block, unit, and SoC levels

Develop and execute functional tests according to verification test plans

Collaborate with cross-functional teams to ensure the highest design quality

Required Qualifications :

M.S. Degree in Computer Engineering, Computer Science, or Electrical Engineering

10+ years of relevant experience in networking hardware verification

Experience with System Verilog language and VCS or equivalent simulation tools

Experience in ground up testbench development and revision control systems like Git or SVN

B.S. Degree in Computer Engineering, Computer Science, or Electrical Engineering