Senior FPGA Engineer II - Network

• Bachelor of Science (BS) or Master of Science (MS) degree in Electrical Engineering or Computer Engineering from an accredited university or institution.
• Minimum of 6 years of industry or university research experience in the design, analysis, and implementation of FPGA systems.
• Production experience in design, implementation, and integration of OSI Layers 2 and 3 networking systems, including protocols such as Ethernet, IP, and MPLS.
• Experience in networking system design, especially in determining throughput and memory requirements.
• Expertise in writing and reviewing VHDL.
• Proficiency in writing and reviewing SystemVerilog for block and system verification.
• Expertise in FPGA design and verification tools for modern complex FPGA and SoC platforms such as Xilinx Vivado and Siemens Questa.
• Excellent written and verbal communication skills.

• Deep understanding of network design and an ability to derive requirements based on high-level objectives.
• Familiarity with non-FPGA networking platforms including ASICs and general-purpose processors.
• Aerospace design and qualification.
• Worst-case analysis, failure method and criticality analyses, and reliability analysis.
• Experience with board-level hardware design.
• Familiarity with communications systems, such as digital signal processing.
• Experience writing low-level software for interfacing to FPGA IP.

We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.