FPGA Validation Engineer

A company is looking for a FPGA / Silicon Validation Engineer 4.

Key Responsibilities

Develop automation scripts to extract metrics from Vivado implementation runs

Automate collection of timing, utilization, and quality metrics using TCL & Python

Integrate metrics into existing data pipelines, databases, and data lakes

Required Qualifications

Hands-on experience with Vivado (AMD / Xilinx) and / or Quartus (Intel / Altera)

Strong scripting expertise in Python and TCL

Solid understanding of FPGA implementation flows and timing analysis

Experience extracting and analyzing FPGA tool reports

Proficiency in TCL for FPGA EDA Automation