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Failure Analysis Engineer
Failure Analysis EngineerInterSources • Santa Clara, CA, US
Failure Analysis Engineer

Failure Analysis Engineer

InterSources • Santa Clara, CA, US
[job_card.30_days_ago]
[job_preview.job_type]
  • [job_card.full_time]
[job_card.job_description]

Title: Failure Analysis Engineer (not traditional Hardware Engineer)
Location: On-site in Santa Clara, CA
Duration: 6 months, (extendable contract)

Requirements:
  • Bachelor's degree in Computer Science, Electrical Engineering or related fields and 3-5 years of related professional experience, or Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 2-3 years of experience.
  • Ability to work independently and drive cross-functional teams to perform root cause analysis using 8D Problem Solving process
  • Provide timely updates and summary reports on analysis results
  • Support failure analysis inspection tasks (optical, IR, X-ray, SAM)

Nice-to-haves:
  • Hands-on experience with curve tracing, Optical/IR Microscope, and SAM analysis
  • Experience with basic electrical tools and methods such as Digital Multi-meter (DMM), Oscilloscopes, Power Supplies
  • Familiar with electrical fault isolation techniques such as thermal emission and photon emission

Top 3 Required Skills
  • Failure Analysis (FA) experience
  • 8D Report Writing (root cause, corrective actions)
  • Collaborate across teams
  • Hands-on with FA Tools: Curve tracing, X-ray, Optical microscopes, Scanning acoustic microscope, Infrared inspection, Emission microscopy, Possibly SEM (scanning electron microscope)

Job Responsibilities
  • Own the entire FA process for customer returns and internal failures
  • Perform visual inspections, coordinate electrical analysis
  • Lead the 8D problem-solving process
  • Collaborate with cross-functional teams
  • Deliver root cause analysis and corrective action reports

Minimum Education
Bachelor's degree in: Electrical Engineering, Computer Science, Materials Engineering, Mechanical Engineering
Lab Environment: Standard lab attire: ESD smock, lab coat, No cleanroom suit required
Minimal chemical exposure (e.g., acetone, alcohol)


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Failure Analysis Engineer • Santa Clara, CA, US

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