Talent.com
Design Verification Engineer
Design Verification EngineerOpenAI • San Francisco, CA, United States
Design Verification Engineer

Design Verification Engineer

OpenAI • San Francisco, CA, United States
[job_card.30_days_ago]
[job_preview.job_type]
  • [job_card.full_time]
[job_card.job_description]

About the Team

OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-native silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI’s supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI.

About the Role

OpenAI is developing custom silicon to power the next generation of frontier AI models. We’re looking for experienced Design Verification (DV) Engineers to ensure functional correctness and robust design for our cutting-edge ML accelerators. You will play a key role in verifying complex hardware systems—ranging from individual IP blocks to subsystems and full SoC—working closely with architecture, RTL, software, and systems teams to deliver reliable silicon at scale.

Key Responsibilities

  • Own the verification of one or more of : custom IP blocks, subsystems (compute, interconnect, memory, etc.), or full-chip SoC-level functionality.
  • Define verification plans based on architecture and microarchitecture specs.
  • Develop constrained-random, directed, and system-level testbenches using SystemVerilog / UVM or equivalent methodologies.
  • Build and maintain stimulus generators, checkers, monitors, and scoreboards to ensure high coverage and correctness.
  • Drive bug triage, root cause analysis, and work closely with design teams on resolution.
  • Contribute to regression infrastructure, coverage analysis, and closure for both block- and top-level environments.

Qualifications

  • BS / MS in EE / CE / CS or equivalent with 3+ years of experience in hardware verification.
  • Proven success verifying complex IP or SoC designs in industry-standard flows
  • Proficient in SystemVerilog, UVM, and common simulation and debug tools (e.g., VCS, Questa, Verdi).
  • Strong knowledge of computer architecture concepts, memory and cache systems, coherency, interconnects, and / or ML compute primitives.
  • Familiarity with performance modeling, formal verification, or emulation is a plus.
  • Experience working in fast-paced, cross-disciplinary teams with a passion for building reliable hardware.
  • To comply with U.S. export control laws and regulations, candidates for this role may need to meet certain legal status requirements as provided in those laws and regulations.

    About OpenAI

    OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity.

    We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic.

    For additional information, please see OpenAI’s Affirmative Action and Equal Employment Opportunity Policy Statement.

    Qualified applicants with arrest or conviction records will be considered for employment in accordance with applicable law, including the San Francisco Fair Chance Ordinance, the Los Angeles County Fair Chance Ordinance for Employers, and the California Fair Chance Act. For unincorporated Los Angeles County workers : we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment : protect computer hardware entrusted to you from theft, loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non-public information. In addition, job duties require access to secure and protected information technology systems and related data security obligations.

    To notify OpenAI that you believe this job posting is non-compliant, please submit a report through this form. No response will be provided to inquiries unrelated to job posting compliance.

    We are committed to providing reasonable accommodations to applicants with disabilities, and requests can be made via this link.

    OpenAI Global Applicant Privacy Policy

    At OpenAI, we believe artificial intelligence has the potential to help people solve immense global challenges, and we want the upside of AI to be widely shared. Join us in shaping the future of technology.

    #J-18808-Ljbffr

    [job_alerts.create_a_job]

    Design Verification Engineer • San Francisco, CA, United States

    [internal_linking.similar_jobs]
    Hardware Design Verification Engineer

    Hardware Design Verification Engineer

    VirtualVocations • Oakland, California, United States
    [job_card.full_time]
    A company is looking for a Hardware Design Verification Engineer.Key Responsibilities Develop and execute verification test plans for IPs and / or sub-systems Create and modify environments and co...[show_more]
    [last_updated.last_updated_variable_days] • [promoted]
    Senior Design Verification Engineer

    Senior Design Verification Engineer

    quadric.io • Burlingame, CA, United States
    [job_card.full_time]
    Quadric has created an innovative general purpose neural processing unit (GPNPU) architecture.Quadric's co-optimized software and hardware is targeted to run neural network (NN) inference workloads...[show_more]
    [last_updated.last_updated_variable_days] • [promoted]
    Senior Design Verification Engineer

    Senior Design Verification Engineer

    Acceler8 Talent • San Francisco, CA, United States
    [job_card.full_time]
    Be among the first 25 applicants.This range is provided by Acceler8 Talent.Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.Direct message the jo...[show_more]
    [last_updated.last_updated_30] • [promoted]
    Senior Design Verification Engineer

    Senior Design Verification Engineer

    quadric, Inc • Burlingame, CA, US
    [job_card.full_time]
    [filters_job_card.quick_apply]
    Quadric has created an innovative general purpose neural processing unit (GPNPU) architecture.Quadric's co-optimized software and hardware is targeted to run neural network (NN) inference workloads...[show_more]
    [last_updated.last_updated_30]
    Sr. RTL Verification Engineer

    Sr. RTL Verification Engineer

    Talencore • Redwood City, CA, United States
    [job_card.full_time] +1
    Redwood City who is inspired to bring the power of generative AI to enhance and speed the design and manufacture of complex semiconductors. Collaborate with experts in hardware, software, and machin...[show_more]
    [last_updated.last_updated_variable_days] • [promoted]
    Design Verification Engineer

    Design Verification Engineer

    EDA CAREERS, (Technology Futures Inc). • San Francisco, CA, United States
    [job_card.full_time]
    Get AI-powered advice on this job and more exclusive features.Direct message the job poster from EDA CAREERS, (Technology Futures Inc). President at EDA-CAREERS and TECHNOLOGY FUTURES Inc.YOU MUST H...[show_more]
    [last_updated.last_updated_30] • [promoted]
    Senior Design Verification Engineer

    Senior Design Verification Engineer

    quadric.io, Inc • Burlingame, CA, United States
    [job_card.full_time]
    Quadric has created an innovative general purpose neural processing unit (GPNPU) architecture.Quadric's co-optimized software and hardware is targeted to run neural network (NN) inference workloads...[show_more]
    [last_updated.last_updated_variable_days] • [promoted]
    ASIC Engineer, Design Verification

    ASIC Engineer, Design Verification

    Meta Inc • Menlo Park, CA, United States
    [job_card.full_time]
    Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization.We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) fo...[show_more]
    [last_updated.last_updated_1_day] • [promoted]
    Design Verification Engineer

    Design Verification Engineer

    Tekfortune Inc • San Francisco, CA, United States
    [job_card.permanent]
    Tekfortune is a fast-growing consulting firm specialized in permanent, contract & project-based staffing services for world's leading organizations in a broad range of industries.In this quickly ch...[show_more]
    [last_updated.last_updated_variable_days] • [promoted]
    Design Verification Engineer

    Design Verification Engineer

    Kasmo Global • Daly City, CA, United States
    [job_card.full_time]
    Title : Design Verification Engineer.Design Verification Engineer, you will contribute to the functional verification of GPU Subsystems such as Shader, Texture, and Memory Systems.Triage regression...[show_more]
    [last_updated.last_updated_variable_days] • [promoted]
    Senior Digital Verification Engineer

    Senior Digital Verification Engineer

    Ethan Alexander Group, Inc. • San Francisco, CA, United States
    [job_card.full_time]
    Senior Digital Verification Engineer.Job title and responsibilities commensurate with experience.Continually advance verification flow with emphasis on reusability from project to project.Be a sign...[show_more]
    [last_updated.last_updated_variable_days] • [promoted]
    Design Verification Engineer

    Design Verification Engineer

    Apple • San Francisco, CA, United States
    [job_card.full_time]
    At Apple, we work every single day to craft products that enrich people’s lives.Do you love working on challenges that no one has solved yet and changing the game? We have an opportunity for an out...[show_more]
    [last_updated.last_updated_variable_days] • [promoted]
    ASIC Design Verification Engineer I (Full Time) - United States

    ASIC Design Verification Engineer I (Full Time) - United States

    Cisco • San Francisco, CA, United States
    [job_card.full_time]
    ASIC Design Verification Engineer I (Full Time) – United States.Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near...[show_more]
    [last_updated.last_updated_variable_days] • [promoted]
    Verification Engineer

    Verification Engineer

    Eridu Corporation • San Francisco, CA, United States
    [job_card.full_time]
    Eridu AI is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate training and inference for large-scale AI models. Today’s AI performance is frequently limited...[show_more]
    [last_updated.last_updated_variable_days] • [promoted]
    Design Verification Engineer

    Design Verification Engineer

    Amadeus Search • San Francisco, CA, United States
    [job_card.full_time]
    Design Verification Engineer - Internal IP.A fast-growing AI startup designing next-generation compute hardware.The company specializes in building high-performance IP blocks and accelerators, aimi...[show_more]
    [last_updated.last_updated_variable_days] • [promoted]
    Design Verification Engineer

    Design Verification Engineer

    Apple Inc. • San Francisco, CA, United States
    [job_card.full_time]
    San Francisco Bay Area, California, United States Hardware.At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved y...[show_more]
    [last_updated.last_updated_30] • [promoted]
    Design Verification Engineer

    Design Verification Engineer

    Eridu AI • San Francisco, CA, United States
    [job_card.full_time]
    Get AI-powered advice on this job and more exclusive features.This range is provided by Eridu AI.Your actual pay will be based on your skills and experience — talk with your recruiter to learn more...[show_more]
    [last_updated.last_updated_30] • [promoted]
    Design Engineer

    Design Engineer

    IVO Inc • San Francisco, CA, United States
    [job_card.full_time]
    Contract negotiation is the most time-consuming, costly, and difficult component of the contract lifecycle-and it hasn't gotten much easier since the days of fax machines.Large language models have...[show_more]
    [last_updated.last_updated_variable_days] • [promoted]