Silicon Design Package Engineer - Santa Clara, CASaransh Inc • Santa Clara, CA, United States
Silicon Design Package Engineer - Santa Clara, CA
Saransh Inc • Santa Clara, CA, United States
[job_card.1_day_ago]
[job_preview.job_type]
- [job_card.full_time]
- [filters_job_card.quick_apply]
[job_card.job_description]
Role : Silicon Design Package Engineer
Location : Santa Clara, CA
This role is highly specialized in semiconductor packaging design, requiring strong EDA tool proficiency and knowledge of advanced packaging technologies
Tools & Knowledge :
Mentor / Siemens and Cadence tools (especially for Package Layout Automation - PLA).
Technical Expertise :
Multi-layer package design experience.
Understanding of substrate manufacturing Design Rules and Assembly Rules.
Familiarity with SIPI (Signal Integrity & Power Integrity) Rules.
Flip-chip package design concepts
[job_alerts.create_a_job]
Silicon Design Engineer • Santa Clara, CA, United States
[internal_linking.similar_jobs]
Supermicro is a Top Tier provider of advanced server, storage, and networking solutions for Data Center, Cloud Computing, Enterprise IT, Hadoop / Big Data, Hyperscale, HPC and IoT / Embedded customers...[show_more]
As Generative AI continues to advance, the performance drivers for data center infrastructure are shifting from systems-on-chip (SOCs) to systems of chips.
In the era of Accelerated Computing, data ...[show_more]
WHAT YOU DO AT AMD CHANGES EVERYTHING.At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded syst...[show_more]
WHAT YOU DO AT AMD CHANGES EVERYTHING.At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded syst...[show_more]
It's fun to work in a company where people truly BELIEVE in what they're doing!.We're committed to bringing passion and customer focus to the business.
If you like wild growth and working with happy...[show_more]
Sandis is currently looking for a Design Engineer to join our growing team in Santa Cruz, CA.Our ideal candidate has experience with civil design, permitting, and applicable software applications i...[show_more]
Silicon Photonics Design Engineer - Active Components.Silicon Photonics Design Engineer - Active Components.Fully Remote - we have offices in Santa Clara, CA and NJ.
PIC Design, Active Silicon Photo...[show_more]
Etched is building AI chips that are hard-coded for individual model architectures.Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower laten...[show_more]
We are seeking a highly skilled.Silicon Photonic IC Design Engineer.Silicon Photonic Integrated Circuits (PICs).ASICs built on leading-edge semiconductor process nodes.
This position offers the oppo...[show_more]
Senior Silicon Circuits System Design Engineer.As one of the technology industry's most desirable employers, NVIDIA is an industry leader in high-performance computing, gaming, and AI.NVIDIA's GPUs...[show_more]
We are seeking a highly skilled and experienced.This role is focused on the critical interface between our ICs and the final package, with a strong emphasis on advanced interconnects and outsourced...[show_more]
If you are a first time user please create your candidatelogin account before you apply for a job.Click Sign In > Create Account).
If you already have a Candidate Account please Sign-In before yo...[show_more]
Possess Mentor Graphics Cadence PLA knowledge.Multiple layers package design (8) experience.Understanding of substrate manufacturing design rule and assembly rule.
Possess Flip Chip Package Design C...[show_more]
A leading tech company in Mountain View seeks a Reliability Engineer with extensive experience in silicon / SOC reliability to manage product reliability throughout its lifecycle.This role requires s...[show_more]
Our client is a global System-on-Chip innovator serving industries like AR / VR, ADAS, networking, and data storage.Headquartered in Yokohama with offices worldwide, Socionext delivers advanced semic...[show_more]
Position : Silicon Design Package Engineer.This role is highly specialized in semiconductor packaging design, requiring strong EDA tool proficiency and knowledge of advanced packaging technologies.M...[show_more]
Develop silicon photonic integrated circuits for datacom applications.The candidate will required will work with the broad engineering team to develop DR and FR silicon PICs.Primary Duties & Re...[show_more]
This role is highly specialized in semiconductor packaging design, requiring strong EDA tool proficiency and knowledge of advanced packaging technologies.
Mentor / Siemens and Cadence tools (especiall...[show_more]
Power Supply Design Engineer
Supermicro • San Jose, CA, United States
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Package Design Engineer
Celestial AI • Santa Clara, CA, US
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Senior Silicon Design Engineer
Advanced Micro Devices, Inc. • San Jose, CA, United States
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Senior Silicon Design Engineer
Advanced Micro Devices • San Jose, CA, United States
[job_card.full_time]
[last_updated.last_updated_variable_days] • [promoted]
Senior Silicon Photonics Design Engineer
Lumentum • San Jose, CA, United States
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Design Engineer
Sandis • Santa Cruz, CA, US
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Sr. Silicon Photonics Design Engineer - Active Components
CyberCoders • Santa Clara, CA, US
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
IC Package Engineer
Etched • Cupertino, CA, US
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Silicon Photonic IC (PIC) Design Engineer
Phizenix • Santa Clara, CA, US
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Senior Silicon Circuits System Design Engineer
NVIDIA • Santa Clara, CA, United States
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Packaging Design Engineer - Advanced Wafer-Level & OSAT Processes
nEye Systems • Santa Clara, CA, US
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
IC Semiconductor Package Designer
Broadcom • San Jose, California, USA
[job_card.full_time]
[last_updated.last_updated_variable_days] • [promoted]
Package Design Engineer
Goldenpick Technologies • San Jose, California, USA
[job_card.full_time]
[last_updated.last_updated_variable_days] • [promoted]
Silicon Packaging Reliability Leader
Google Inc. • Mountain View, CA, United States
[job_card.full_time]
[last_updated.last_updated_variable_days] • [promoted]
Senior Package Design Engineer
P. Chappel Associates, Inc. • San Jose, California, United States
[job_card.full_time]
[last_updated.last_updated_variable_days] • [promoted]
Silicon Design Package Engineer
AceStack • Santa Clara, CA, United States
[job_card.full_time]
[last_updated.last_updated_variable_hours] • [promoted] • [new]
Lead Silicon Photonics Design Engineer
Coherent • Fremont, California, USA
[job_card.full_time]
[last_updated.last_updated_variable_days] • [promoted]
Semiconductor Packaging engineer
Vista Applied Solutions Group Inc • Santa Clara, CA, United States
[job_card.full_time]
[last_updated.last_updated_variable_hours] • [promoted] • [new]