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Sr Principal Design Engineer
Sr Principal Design EngineerCadence Design Systems • San Jose, CA, United States
Sr Principal Design Engineer

Sr Principal Design Engineer

Cadence Design Systems • San Jose, CA, United States
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  • [job_card.full_time]
[job_card.job_description]

Sr Principal Design Engineer page is loaded## Sr Principal Design Engineerlocations : SAN JOSEtime type : Full timeposted on : Posted Todayjob requisition id : R52250##

  • At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
  • Specific duties include :
  • Be responsible for high-performance memory IP architecture design, owning the IC micro-architecture, timing budget, power analysis platform development.
  • Proficiency in logic design, simulation, synthesis, STA and testing
  • Proficiency in Verilog / SystemVerilog and its simulation environment
  • Good knowledge of IC design for high-speed and low power
  • At least five years’ experience driving complex IC development projects, excellent communication skills and the uncanny ability to both lead and contribute in a cooperative team environment.
  • Position Requirements :
  • Essential Qualifications : Must have BS degree with 8+ years of applicable experience, MS degree with 6+ years of applicable experience in electrical engineering, microelectronics, comparable engineering science or solid state physics.
  • Essential that the individual demonstrates strong communication, verbal and written.
  • Experience on the memory IP is desired
  • Requires good communication skills in English.
  • The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation : bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include : paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
  • ##
  • We’re doing work that matters. Help us solve what others can’t.
  • Equal Employment Opportunity Policy :
  • Cadence is committed to equal employment opportunity throughout all levels of the organization.We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact staffing@cadence.com.
  • Privacy Policy :
  • Job Applicant If you are a job seeker creating a profile using our careers website, please see the .E-Verify Cadence participates in theE-Verify program in certain U.S. locations as required by law.Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

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Sr Design Engineer • San Jose, CA, United States

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