Design Verification Engineer

Eridu AI is a Silicon Valley hardware startup focused on accelerating training and inference performance for large AI models. Today’s AI model performance is often gated by infrastructure bottlenecks. Eridu AI introduces multiple industry-first innovations across semiconductors, software and systems to deliver solutions that improves AI data center performance to increase GPU utilization while simultaneously reducing capex and power. Eridu AI’s solution and value proposition have been widely validated with several hyperscalers.

Base pay range

$195,000.00 / yr - $265,000.00 / yr

Key Responsibilities

Specialized Verification Strategy : Develop verification infrastructure and test cases for ASICs in the area of network fabrics, leveraging your extensive experience in networking.

Technical Expertise in ASIC Verification : Provide technical leadership in the verification of complex ASIC designs, ensuring compliance with industry standards and project specifications. Gate & Timing simulations : collaborate with the team to execute comprehensive gate-level simulations, including timing and power analysis, to validate the ASIC design before tape-out.

RTL Coverage Analysis : deliver detailed coverage metrics to assess the thoroughness of the test suite. Offer actionable feedback to design engineers, focusing on identifying gaps and suggesting enhancements to elevate test effectiveness and broaden coverage scope.

Quality Assurance and Process Optimization : Uphold the highest standards of verification quality. Initiate and implement process improvements for increased efficiency and effectiveness.

Qualifications

ME / BE in Electrical Engineering, Computer Engineering, or related field.

Experience : A MINIMUM of 8-15 years in ASIC verification in the area of data center networking.

Verification Skills : Expertise in Hardware Verification and Hardware Verification Methodology (e.g., System Verilog, OVM / VMM / UVM) with a strong understanding of ASIC Design and Verification flow. Experience with functional coverage, gate / timing / power simulations, constrained random verification and test-plan documentation is required.

Technical Skills : Python / Perl / Tcl experience, strong problem solving and debugging skill is a plus.

Domain Knowledge : Prior experience with Ethernet and PCIe Protocols, Serial and Parallel VIP verification modes and High speed Serdes is a strong plus.

Communication Skills : Exceptional communication abilities, capable of effectively coordinating, and articulating complex technical issues in a clear manner.

Why Join Us?

At Eridu AI, you’ll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI networking solutions, transforming data center capabilities.

Seniority Level

Mid-Senior level

Employment Type

Full-time

Job Function

Semiconductor Manufacturing

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