A global tech company in San Francisco seeks a Sr. ASIC Design Engineer for its Cloud-Scale Machine Learning Acceleration team. This role involves designing and optimizing hardware for machine learning applications. Candidates should have a strong background in ASIC design, proficiency in SystemVerilog, and over 10 years of relevant experience. The position offers competitive compensation up to $261,500 annually, based on skills and experience.
#J-18808-Ljbffr
Asic Design Engineer • San Francisco, CA, United States