Entry-Level ASIC Verification Engineer — Shape Next-Gen SiliconCisco • San Francisco, California, United States
Entry-Level ASIC Verification Engineer — Shape Next-Gen Silicon
Cisco • San Francisco, California, United States
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- [job_card.full_time]
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A leading tech company is seeking an ASIC Design Verification Engineer I in San Francisco, CA. You will work collaboratively with a talented team on innovative communications and network processing silicon. Candidates should have recent or current Bachelor’s degree studies and be familiar with hardware description languages and RTL design tools. This is an entry-level, full-time position offering a chance to impact billions globally while working on cutting-edge technologies in a supportive, team-oriented environment.
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