Design Verification EngineerAmadeus Search • San Francisco, CA, United States
Design Verification Engineer
Amadeus Search • San Francisco, CA, United States
[job_card.variable_days_ago]
[job_preview.job_type]
- [job_card.full_time]
[job_card.job_description]Strong experience (typically 5 + years) in design verification of digital IP in a hardware environment. Proficiency in SystemVerilog (or equivalent HDL), and verification methodologies (UVM / UVM-like frameworks). Deep understanding of digital logic, microarchitecture (e.g., pipelines, memory subsystems, AXI / AMBA interconnects), timing, and clocking domains. Experience with functional coverage, constrained-random verification, assertions, and testbench development. Familiar with simulation tools, emulation / prototyping flows, and regression automation. Excellent debug skills, ability to drive issues to resolution across cross-functional teams. Bachelor's or Master's in Electrical Engineering / Computer Engineering or equivalent; advanced degree preferred. Strong communication and collaboration skills; ability to lead in a fast-paced startup environment. Experience in AI / hardware accelerator domain (e.g., tensor cores, matrix engines, AI pipelines). Familiarity with low-power design, clock gating, power domains, and verification of power / clock islands. Experience working with mixed-signal or analog / mixed-signal IP verification, or prototyping on FPGA / emulation platforms. Background in physical verification, synthesis flow, timing closure or floorplanning. Opportunity to design and verify cutting-edge compute IP for AI workloads. Early-stage startup with high autonomy, ownership and the ability to shape architecture and process. Competitive compensation, equity participation and benefits aligned with high-growth startup norms. Collaborative, high-velocity culture driven by innovation and ambitious goals.
Title : Design Verification Engineer - Internal IP
Location : Bay Area (hybrid) or Toronto
About the Company :
A fast-growing AI startup designing next-generation compute hardware. The company specializes in building high-performance IP blocks and accelerators, aiming to enable leading-edge AI workloads with custom silicon and software stacks.
Role Overview :
You will lead verification efforts on internal IP blocks that power the company's compute architecture. Working closely with design engineers and systems teams, you'll define verification strategies, develop testbenches, write directed and random stimulus, debug failures, and sign off quality IP for integration into larger systems.
Key Responsibilities :
- Review IP specifications and architecture to understand functional, performance, and integration requirements.
- Develop verification plans, create functional coverage models, define corner cases and failure modes.
- Build testbenches using SystemVerilog (or similar HDL), UVM or equivalent methodology, and integrate into simulation / acceleration / emulation flows.
- Automate regressions, monitor coverage metrics, identify gaps, and work with design teams to close them.
- Debug and triage simulation / emulation failures, analyze waveforms / traces, provide meaningful feedback to design and physical teams.
- Collaborate with RTL designers, synthesis and physical teams, CAD and systems / firmware teams to ensure smooth handoff and tape-out readiness.
- Mentor or collaborate with other engineers to drive verification best practices and process improvements.
Qualifications :
Nice to Have :
What's in It for You :
[job_alerts.create_a_job]
Design Verification Engineer • San Francisco, CA, United States
[internal_linking.similar_jobs]
Be among the first 25 applicants.This range is provided by Acceler8 Talent.Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.Direct message the jo...[show_more]
Quadric has created an innovative general purpose neural processing unit (GPNPU) architecture.Quadric's co-optimized software and hardware is targeted to run neural network (NN) inference workloads...[show_more]
Eridu AI is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate training and inference for large-scale AI models.
Today’s AI performance is frequently limited...[show_more].)
Get AI-powered advice on this job and more exclusive features.Direct message the job poster from EDA CAREERS, (Technology Futures Inc).
President at EDA-CAREERS and TECHNOLOGY FUTURES Inc.YOU MUST H...[show_more]
San Francisco Bay Area, California, United States Hardware.At Apple, we work to craft products that enrich people’s lives.
Do you love working on challenges that no one has solved yet and changing t...[show_more]
A leading robotics company is seeking a Validation and Verification Engineering Lead to orchestrate testing strategies and ensure system functionality meets safety requirements.This role combines l...[show_more]
Our client is a world-leading technology company at the forefront of semiconductor innovation, powering some of the most advanced digital systems in the industry.
Their work touches billions of user...[show_more]
Zipline is looking for software engineers to build the tools and infrastructure that power our systems validation and flight test organizations.
This team develops precise, efficient, and scalable s...[show_more]
Develop FPGA Design Verification tests, and test plans.Review Detailed Design specifications for logic to be tested.Execute tests, analyze results, review RTL, determine probably source of failures...[show_more]
A company is looking for a Firmware Validation Engineer.Key Responsibilities Develop and execute comprehensive test plans, test cases, and test strategies for firmware validation Conduct functio...[show_more]
OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads.
The team is responsible for building the next generation of AI-na...[show_more]
Please note this posting is to advertise potential job opportunities.This exact role may not be open today but could open in the near future.
When you apply, a Cisco representative may contact you d...[show_more]
Would you like to join Apple’s growing wireless silicon development team? Our wireless SoC organization is responsible for all aspects of wireless silicon development with a particular emphasis on ...[show_more]
ASIC Design Verification Engineer.Our client is building the first latency optimized SoC for their industry.Using its proven AI accelerator designs, we are targeting best in class latency with orde...[show_more]
CAI is a professional services company established in 1996 that has grown to nearly 800 people worldwide.For mission-critical and regulated industries needing to deliver essential solutions in high...[show_more]
Get AI-powered advice on this job and more exclusive features.This range is provided by Eridu AI.Your actual pay will be based on your skills and experience — talk with your recruiter to learn more...[show_more]
At Serve Robotics, we’re reimagining how things move in cities.Our personable sidewalk robot is our vision for the future.
It’s designed to take deliveries away from congested streets, make deliveri...[show_more]
Senior Digital Verification Engineer.Job title and responsibilities commensurate with experience.Continually advance verification flow with emphasis on reusability from project to project.Be a sign...[show_more]
Senior Design Verification Engineer
Acceler8 Talent • San Francisco, CA, United States
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Senior Design Verification Engineer
quadric, Inc • Burlingame, CA, US
[job_card.full_time]
[filters_job_card.quick_apply]
[last_updated.last_updated_30]
Verification Engineer
Eridu Corporation • San Francisco, CA, United States
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Design Verification Engineer
EDA CAREERS, (Technology Futures Inc). • San Francisco, CA, United States
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Design Verification Engineer
Apple Inc. • San Francisco, CA, United States
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Lead Validation & Verification Engineer
Bedrock Robotics • San Francisco, CA, United States
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Design Verification Engineer
Quix Recruitment Group Ltd • San Francisco, CA, US
[job_card.full_time]
[last_updated.last_updated_variable_days] • [promoted]
Software Engineer - Systems Validation
Zipline • South San Francisco, CA, US
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Design Verification Engineer
WinMax Systems Corporation • Menlo Park, CA, United States
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Firmware Validation Engineer
VirtualVocations • San Francisco, California, United States
[job_card.full_time]
[last_updated.last_updated_variable_days] • [promoted]
Design Verification Engineer
OpenAI • San Francisco, CA, United States
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
ASIC Design Verification Engineer I (Full Time) - United States
Cisco Systems • San Francisco, CA, United States
[job_card.full_time]
[last_updated.last_updated_variable_days] • [promoted]
Wireless Design Verification Engineer
Apple • San Francisco, CA, United States
[job_card.full_time]
[last_updated.last_updated_variable_days] • [promoted]
ASIC Design Verification Engineer (all levels)
SQL Pager LLC • San Francisco, CA, United States
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Validation Engineer
CAI • San Francisco, CA, US
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Design Verification Engineer
Eridu AI • San Francisco, CA, United States
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Lead Engineer, Systems Verification & Validation - Autonomy
Serve Robotics • Redwood City, CA, United States
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]
Senior Digital Verification Engineer
Ethan Alexander Group • San Francisco, CA, US
[job_card.full_time]
[last_updated.last_updated_30] • [promoted]