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Senior Video ASIC Design Engineer
Senior Video ASIC Design EngineerNVIDIA Corporation • Santa Clara, CA, United States
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Senior Video ASIC Design Engineer

Senior Video ASIC Design Engineer

NVIDIA Corporation • Santa Clara, CA, United States
[job_card.30_days_ago]
[job_preview.job_type]
  • [job_card.full_time]
[job_card.job_description]

We are now looking for a Senior Video ASIC Design Engineer!

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology-and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. This specific role will be part of a front-end multi-media IP team responsible for developing SoC's.

What you will be doing :

  • Develop ASIC designs for Video IP, including micro-architecture, design coding, performance optimization, functional coverage definition, synthesis, power, timing, and area optimization, static checks, and support of physical design engineers through place and route.
  • Work with the architecture team to define feature additions and roadmap.
  • Work with the ASIC team to drive design methodology to continuously improve design quality and engineer efficiency, including leveraging best in class AI tools and techniques.
  • Collaborate with verification engineers, IP architects, and other ASIC design engineers to formalize product features support, performance, and microarchitecture
  • Participate in verification closure through coverage analysis, regression triage and debug
  • Debug failing tests and work with the architecture modeling team to determine proper expected design behavior.
  • Work with physical design engineers to drive timing, area, and power closure.
  • Integrate IP's into full chip ensuring interface specifications are aligned and all full chip requirements are met.

What we need to see :

  • BS / MS Electrical or Computer Engineering (or equivalent experience)
  • 8+ years of proven experience
  • Expertise in designing optimized, sophisticated IPs with Verilog and / or HLS
  • Knowledge of video, display, and camera designs is highly desired but not required
  • Programming and scripting experience with C and Python
  • Excellent written, verbal and technical communication skills
  • Demonstrate use of out-of-box thinking for creative solutions to highly tricky problems
  • With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our best-in-class engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you!

    #LI-Hybrid

    Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD.

    You will also be eligible for equity and benefits .

    Applications for this job will be accepted at least until October 18, 2025.

    NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

    #J-18808-Ljbffr

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