Hardware Design Verification Engineer

A company is looking for a Hardware Design Verification Engineer.

Key Responsibilities

Develop and execute verification test plans for IPs and / or sub-systems

Create and modify environments and components for UVM simulation verification

Run simulations, perform coverage analysis, and debug test failures

Required Qualifications

Bachelor's degree in engineering required

10+ years of experience in hardware design verification required

Extensive experience with UVM and System Verilog within the last 3 years

Basic knowledge of Verilog RTL programming language

Knowledge of AMBA AXI protocol preferred, but not required