About the Team
OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-native silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI’s supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI.
About the Role
We are looking for an embedded engineer to help build firmware and associated modeling software for OpenAI’s in house AI accelerator. This role involves designing and developing drivers and functional models for a large array of HW components, writing high throughput and low latency firmware code, investigating bring-up and production issues.
Responsibilities
Design and implement drivers for hardware peripherals, including those related to AI chips.
Design and implement functional software models to simulate SoC uncore logic and enable FW testing against the model
Design and implement low-latency and high throughput embedded SW to manage HW resources.
Work with adjacent software and hardware teams to implement requirements, debug issues and shape future generations of the hardware.
Collaborate with vendors to integrate their technologies within our systems.
Bring up and debug firmware / driver on new platforms.
Come up with processes and debug issues raised in the field.
Set up monitoring, integration testing and diagnostics tools.
Qualifications
5+ years of experience working in embedded SW space.
Ability to thrive in ambiguity and learn new technologies.
Strong programming skills in C / C++ and / or Rust.
Experience developing high throughput, low latency and multi-threaded code.
Experience working with real time operating systems (RTOS).
Experience developing hardware drivers and working with hardware
Experience with HW / SW co-design
Knowledge of common embedded protocols, e.g. UART, I2C, SPI, etc.
Knowledge of microprocessor and common ARM architectures (e.g. AMBA) is a plus.
Knowledge of PCIe, ethernet and other high BW communication protocols is a plus.
Experience with GPUs or other compute hardware is a plus.
Experience deploying large compute clusters is a plus.
To comply with U.S. export control laws and regulations, candidates for this role may need to meet certain legal status requirements as provided in those laws and regulations.
ASIC Firmware Engineer Modeling • San Francisco