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Verification engineer Jobs in USA

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Verification engineer • usa

Last updated: 2 hours ago

Verification Architect/Engineer

SnaphuntAustin, United States
Full-time

Visa Sponsorship: H1-B Sponsorship Available.We are looking for a Verification Engineer to be driving into the complicated RTL design verification activity on various design aspects.You’ll be part ...Show more

Software Verification Engineer

ActalentGrand Rapids, Michigan, USA
Full-time +1

Job Title: Software Verification Engineer.The Software Verification Engineer will perform hands-on white box testing and Python-based test automation to support the development of a next-generation...Show more

Software Verification Engineer

ActalentRichmond, Virginia, USA
Full-time

Job Title: Software Verification Engineer.The Software Verification Engineer will perform hands-on white box testing and Python-based test automation to support the development of a next-generation...Show more

ASIC Verification Engineer

AMDSanta Clara, CA, US
Full-time

WHAT YOU DO AT AMD CHANGES EVERYTHING.At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded syst...Show more

Field Verification Engineer

LTTSMidland, TX, US
Permanent

Job Description & Skill Requirement:.Conduct systematic field walkdowns at designated ExxonMobil facilities to physically verify installed assets, layouts, and flow paths against approved engineeri...Show more

 • New!

ASIC Verification Engineer

Lumiere SystemsEdison, NJ, USA
Remote
Full-time
Quick Apply

This is a core Engineering Role.USA who can work in EST time zone.Candidate might be asked to travel to Paris every quarter for 1 week based on need of client need.It will be nice if Candidate know...Show more

Verification Engineer

VortexlinkSaratoga, CA, US
Full-time

Key Responsibilities Specialized Verification Strategy: Develop verification infrastructure and test cases for ASICs in the area of network fabrics, leveraging your extensive experience in networking.Show more

Verification Engineer

InterSourcesSan Jose, CA, US
Full-time

Led verification efforts for complete FPGA designs in high-end router products.Interpret design specifications and collaborate closely with design engineers to define verification scenarios.Develop...Show more

Engineer Verification & Validation

Medline Industries - Transportation & OperationsMundelein, IL, US
Full-time

Job Summary Under general supervision, plan and execute verification and validation activities.Ensure regulatory compliance by inspecting, measuring, analyzing, auditing, calibrating and testing in...Show more

 • Promoted

Sr. Verification Engineer

MillenniumSoftSan Diego, CALIFORNIA
Full-time

Eligibilities & qualifications.Show more

Emulation Verification Engineer

Advanced Micro Devices, IncAustin, Texas, United States
Full-time

WHAT YOU DO AT AMD CHANGES EVERYTHING.At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded syst...Show more

Verification Engineer

Broadcom Inc.USA, CA San Jose Innovation Drive
Full-time

If you are a first time user, please create your candidate login account before you apply for a job.If you already have a Candidate Account, please Sign-In before you apply.You will be joining Broa...Show more

Systems Verification Engineer

Scientific Drilling Inc.Paso Robles, CA, USA
Full-time
Quick Apply

Scientific Drilling is looking for a.Systems Verification Engineer .Applied Technologies Center in Paso Robles, CA.The ideal candidate will have a strong understanding of embedded systems hardware ...Show more

Design Verification Engineer

Momento USASanta Clara, CA, United States
Full-time
Quick Apply

Momento USA is a global technology consulting, talent acquisition, and creative development firm that addresses clients' most pressing needs and challenges.We are currently looking for a Design Ver...Show more

Engineer - Verification

SchaefflerWooster, OH
Full-time

Schaeffler is a dynamic global technology company and its success has been a result of its entrepreneurial spirit and long history of private ownership.As a partner to all of the major automobile m...Show more

Design Verification Engineer

MercorSan Francisco, California, United States
Remote
Full-time
Quick Apply

Headquartered in San Francisco, our investors include.Collaborate with architecture, verification, and implementation teams to ensure seamless integration.Solid understanding of digital design fund...Show more

Verification & Validation Engineer

1018 Crown Technical Systems, LlcFontana, CA, USA
Full-time

To support our extraordinary teams who build great products and contribute to our growth, we’re looking to add a.Verification & Validation Engineer.The ideal candidate has a strong engineering back...Show more

Verification & Validation Engineer

FlexFontana, CA, US
Full-time

Job Posting Start Date 03-17-2026 Job Posting End Date 05-15-2026.Crown Technical Systems, a Flex Company, is a leader in power distribution and protection systems concentrating on sophisticated, s...Show more

Verification & Validation Engineer

eInfochips, IncNorthford, Connecticut
Full-time

Analyze complex software requirements and design data-driven validation strategies for web, mobile, and real-time embedded systems.Develop and execute robust automated test suites using Robot Frame...Show more

Verification Architect/Engineer

Verification Architect/Engineer

SnaphuntAustin, United States
30+ days ago
Job type
  • Full-time
Job description

Visa Sponsorship: H1-B Sponsorship Available

JOB DESCRIPTION :

About The Position

We are looking for a Verification Engineer to be driving into the complicated RTL design verification activity on various design aspects.

You’ll be part of a pioneering company at the at the forefront of next-gen optical communication systems (800G, 1.6T, and beyond), working alongside seasoned industry leaders and engineers. This is an exceptional opportunity to influence the architecture of AI connectivity and shape the technologies driving modern data infrastructure.

Responsibilities

  • Plan, architect, and execute verification strategies for digital design blocks based on design specifications.
  • Develop and maintain verification environments using SystemVerilog and UVM
  • Define and implement comprehensive coverage metrics, including corner-case scenarios.
  • Debug RTL functionality in close collaboration with design and architecture teams.
  • Perform coverage collection, analysis, and closure to ensure full functional completeness.
  • Participate in design reviews, test plan creation, regressions, and sign-off activities.

Required Qualifications

  • 5+ years of professional experience in digital/RTL engineering
  • At least 3 years of experience in design verification
  • In depth knowledge in VLSI verification flow, languages and concepts – a must.
  • Deep understanding of VLSI verification flows, concepts, and industry-standard tools.
  • Proven experience completing at least one full block or system verification cycle.
  • Hands-on experience building verification environments using SystemVerilog + UVM, or equivalent frameworks (specman/eRM, SystemC).
  • Strong debugging skills and familiarity with waveform analysis tools.

Nice to Haves

  • Digital data-path or protocol-level verification, particularly Ethernet or related high-speed interfaces.
  • Experience writing advanced functional, code, and corner-case coverage.
  • Exposure to mixed-signal or analog/digital verification environments.
  • Strong communication skills, including writing test plans, documenting results, and presenting to cross-functional teams.

Must Have :

• On-site in Austin, TX, five days a week.

• 5+ years of professional experience in digital/RTL engineering

• At least 3 years of experience in design verification

• In depth knowledge in VLSI verification flow, languages and concepts – a must.

• Deep understanding of VLSI verification flows, concepts, and industry-standard tools.

• Proven experience completing at least one full block or system verification cycle.

• Hands-on experience building verification environments using SystemVerilog + UVM, or equivalent frameworks (specman/eRM, SystemC).

• Strong debugging skills and familiarity with waveform analysis tools.