SERDES PHY Engineer -Third Party IPs

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE : The candidate will join a highly visible and influential team of high-speed physical interface (PHY) and mixed signal IP experts tasked with integration and support of 3rd Party SERDES and mixed signal IP across all AMD products. The team works across a large swath of AMD integration and post-silicon teams as well as with IP vendors and AMD customers. THE PERSON : The ideal candidate is self-motivated to work independently as well as collaboratively with technical people across a variety of AMD and vendor / partner teams, and who thinks of herself / himself as a problem solver. KEY RESPONSIBILITIES : Serve as the AMD technical owner of various 3rd party SERDES and other mixed signal IP. Provide pre- and post-silicon IP leadership and support for SerDes PHYs and other mixed signal IP, in particular IP like PCIe, Ethernet, UCIe, USB, MIPI, and Display PHYs, plus PLLs and miscellaneous IOs and circuits. Work directly with 3rd party IP vendors to support design transfer, release of design views and collaterals, and integration of IP across many AMD products. Work with AMD integration teams on integration and checks for electrical, logical, and physical quality. Support IC package and PCB design teams in completing and evaluating their signal and power integrity analyses. Perform technical evaluation of new IP for licensing. Provide post-silicon support from bring-up of first silicon, to debug, ATE production test, lab validation and characterization, compliance testing, and customer support. Provide expertise in translating post-silicon learnings into suggestions for the new IP design process for SerDes IP. PREFERRED EXPERIENCE : Strong professional experience in the semiconductor industry doing analog mixed-signal circuit / system design, analysis, validation and / or test, characterization and debug. Design knowledge of high-speed I / O SerDes architectures and blocks, plus general mixed-signal IP, e.g. CTLE, FFE, DFE, VGA, CDR, PLL / DLL, TX driver, EMC, GPIO, etc. Experience with one or more interface protocols like PCIe, Ethernet, USB, DisplayPort, HDMI, MIPI etc. preferred. Experience with advanced FinFET semiconductor technologies at and below 7nm. Basic understanding of RTL, logic design, and digital circuits Python and / or Perl programming desirable. Should be familiar with UNIX environment. Laboratory experience, including hands-on use of equipment : BERT, oscilloscope, logic analyzer, etc. desirable. Strong analytical / problem solving skills, ability to learn quickly, and attention to detail. Good teamwork and oral and written communications skills are critical. ACADEMIC CREDENTIALS : B.S. or M.S. Electrical Engineering preferred LOCATION : Austin, TX #LI-SL3 #LI-HYBRID Benefits offered are described : AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and / or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.THE ROLE : The candidate will join a highly visible and influential team of high-speed physical interface (PHY) and mixed signal IP experts tasked with integration and support of 3rd Party SERDES and mixed signal IP across all AMD products. The team works across a large swath of AMD integration and post-silicon teams as well as with IP vendors and AMD customers. THE PERSON : The ideal candidate is self-motivated to work independently as well as collaboratively with technical people across a variety of AMD and vendor / partner teams, and who thinks of herself / himself as a problem solver. KEY RESPONSIBILITIES : Serve as the AMD technical owner of various 3rd party SERDES and other mixed signal IP. Provide pre- and post-silicon IP leadership and support for SerDes PHYs and other mixed signal IP, in particular IP like PCIe, Ethernet, UCIe, USB, MIPI, and Display PHYs, plus PLLs and miscellaneous IOs and circuits. Work directly with 3rd party IP vendors to support design transfer, release of design views and collaterals, and integration of IP across many AMD products. Work with AMD integration teams on integration and checks for electrical, logical, and physical quality. Support IC package and PCB design teams in completing and evaluating their signal and power integrity analyses. Perform technical evaluation of new IP for licensing. Provide post-silicon support from bring-up of first silicon, to debug, ATE production test, lab validation and characterization, compliance testing, and customer support. Provide expertise in translating post-silicon learnings into suggestions for the new IP design process for SerDes IP. PREFERRED EXPERIENCE : Strong professional experience in the semiconductor industry doing analog mixed-signal circuit / system design, analysis, validation and / or test, characterization and debug. Design knowledge of high-speed I / O SerDes architectures and blocks, plus general mixed-signal IP, e.g. CTLE, FFE, DFE, VGA, CDR, PLL / DLL, TX driver, EMC, GPIO, etc. Experience with one or more interface protocols like PCIe, Ethernet, USB, DisplayPort, HDMI, MIPI etc. preferred. Experience with advanced FinFET semiconductor technologies at and below 7nm. Basic understanding of RTL, logic design, and digital circuits Python and / or Perl programming desirable. Should be familiar with UNIX environment. Laboratory experience, including hands-on use of equipment : BERT, oscilloscope, logic analyzer, etc. desirable. Strong analytical / problem solving skills, ability to learn quickly, and attention to detail. Good teamwork and oral and written communications skills are critical. ACADEMIC CREDENTIALS : B.S. or M.S. Electrical Engineering preferred LOCATION : Austin, TX #LI-SL3 #LI-HYBRID

Benefits offered are described : AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and / or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.