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Advanced Micro Devices, Inc
Embedded SoC ArchitectAdvanced Micro Devices, Inc • San Jose, California, United States
Embedded SoC Architect

Embedded SoC Architect

Advanced Micro Devices, Inc • San Jose, California, United States
30+ days ago
Job type
  • Full-time
Job description


WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.Together, we advance your career.




THE ROLE:

The AMD Adaptive Embedded Computing Group is looking for a Senior SoC Architect to join the team in defining the next generation of Adaptive and Embedded SoCs. You will drive novel SoC architecture solutions across a wide range of applications, including Embedded Computing, AI/ML, Data Center, Communications, Automotive, and Aerospace, in close collaboration with customers, partners, product planning, SoC and IP architects, and design & verification teams.

THE PERSON:

As a Senior SoC Architect you will help drive new architecture initiatives that leverage the state-of-the-art Core (e.g. x86, RISC-V, ARM), I/O (e.g. PCIe Ethernet USB), and accelerator technologies and standards. You will exercise your technical expertise and excellent communication skills to collaborate with design and product planning with an eye towards delivering innovative and highly competitive adaptive accelerators and embedded computing solutions.

KEY RESPONSIBILITIES:

  • Responsible for driving low-power, cost-optimized SoC architectures with processor, accelerator and I/O subsystems.
  • Define SoC architectures with internal embedded processor-subsystems, Network on Chip, Memory controllers, and FPGA fabric.
  • Create flexible and modular subsystem architectures that can be deployed in either chiplet, monolithic or 3D form factors.
  • Work with customers, and cross-functional teams to scope SoC requirements, analyze PPA tradeoffs, and then define architectural requirements that meet the PPA and schedule targets.
  • Define hardware, software, and firmware interactions between embedded processing subsystems, hardware accelerators, and external CPUs.
  • Author architecture specifications in clear and concise language. Guide and assist pre-silicon design/verification and post-silicon validation during the execution phase.

PREFERRED EXPERIENCE:

  • Technical background architecting SoC, processor, accelerator and I/O subsystems.
  • Technical knowledge of Cores running either x86, RISC-V, or ARM ISA, I/O protocols such as PCIe and Ethernet, and how SoCs are architected to integrate across the various subsystems, including DDR.
  • Expertise in at least one of the domains such as embedded computing, aerospace & defense, data-center, networking, or automotive industries.
  • Knowledge of ARM Processors and AXI Interconnects desired.
  • Knowledge of FPGA and AI/ML Accelerators desired.
  • Knowledge of boot, security, debug, telemetry and RAS desired.

ACADEMIC CREDENTIALS:

  • BS/MS/PhD in electrical or computer engineering or related field.

LOCATION: San Jose, CA

This role is not eligible for visa sponsorship.

#LI-BW2

#LI-HYBRID




Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

THE ROLE:

The AMD Adaptive Embedded Computing Group is looking for a Senior SoC Architect to join the team in defining the next generation of Adaptive and Embedded SoCs. You will drive novel SoC architecture solutions across a wide range of applications, including Embedded Computing, AI/ML, Data Center, Communications, Automotive, and Aerospace, in close collaboration with customers, partners, product planning, SoC and IP architects, and design & verification teams.

THE PERSON:

As a Senior SoC Architect you will help drive new architecture initiatives that leverage the state-of-the-art Core (e.g. x86, RISC-V, ARM), I/O (e.g. PCIe Ethernet USB), and accelerator technologies and standards. You will exercise your technical expertise and excellent communication skills to collaborate with design and product planning with an eye towards delivering innovative and highly competitive adaptive accelerators and embedded computing solutions.

KEY RESPONSIBILITIES:

  • Responsible for driving low-power, cost-optimized SoC architectures with processor, accelerator and I/O subsystems.
  • Define SoC architectures with internal embedded processor-subsystems, Network on Chip, Memory controllers, and FPGA fabric.
  • Create flexible and modular subsystem architectures that can be deployed in either chiplet, monolithic or 3D form factors.
  • Work with customers, and cross-functional teams to scope SoC requirements, analyze PPA tradeoffs, and then define architectural requirements that meet the PPA and schedule targets.
  • Define hardware, software, and firmware interactions between embedded processing subsystems, hardware accelerators, and external CPUs.
  • Author architecture specifications in clear and concise language. Guide and assist pre-silicon design/verification and post-silicon validation during the execution phase.

PREFERRED EXPERIENCE:

  • Technical background architecting SoC, processor, accelerator and I/O subsystems.
  • Technical knowledge of Cores running either x86, RISC-V, or ARM ISA, I/O protocols such as PCIe and Ethernet, and how SoCs are architected to integrate across the various subsystems, including DDR.
  • Expertise in at least one of the domains such as embedded computing, aerospace & defense, data-center, networking, or automotive industries.
  • Knowledge of ARM Processors and AXI Interconnects desired.
  • Knowledge of FPGA and AI/ML Accelerators desired.
  • Knowledge of boot, security, debug, telemetry and RAS desired.

ACADEMIC CREDENTIALS:

  • BS/MS/PhD in electrical or computer engineering or related field.

LOCATION: San Jose, CA

This role is not eligible for visa sponsorship.

#LI-BW2

#LI-HYBRID

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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Embedded SoC Architect • San Jose, California, United States

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