About Analog Devices
Analog Devices, Inc. (NASDAQ: ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at and on and.
Employer: Analog Devices, Inc.
Job Title: Staff Engineer, Design Verification Engineering
Job Requisition: 1010.1197.6 / R262387
Job Location: Chandler, Arizona
Job Type: Full Time
Rate of Pay: $172,390 - $199,229 per year
Duties:
Define and verify interfaces, state machines, and controlling logic required to implement new products for Data Center, Energy, and Automotive applications. Develop directed and constrained random test cases in SystemVerilog. Architect, implement, and/or manage complete metric-driven SystemVerilog and UVM verification environments as determined by project complexity. SystemVerilog Assertion for Dynamic and Formal Verification. Design and maintain mixed-signal simulation (Cadence AMS); write Verilog-AMS and
Real Number Models. Product definition involvement.
Partial telecommute benefit (2 days/week work from home).
Requirements: Must have a Master’s degree in Electrical Engineering, Materials Engineering, Physics, or closely related technical discipline (willing to accept foreign education equivalent) and four (4) years of experience as a Design Verification Engineer or related occupation performing module level design performing with Verilog RTL and function verification.
Alternatively, employer will accept a Bachelor’s degree in Electrical Engineering, Materials Engineering, Physics, or closely related technical discipline (willing to accept foreign education equivalent) and six (6) years of experience as a Design Verification Engineer or related occupation performing module level design performing with Verilog RTL and function verification.
Must also possess the following (quantitative experience requirements not applicable to this section):
Contact: Eligible for employee referral program. Apply online at and Reference Position Number: R262387.
Job Req Type: ExperiencedRequired Travel: NoShift Type: 1st Shift/Days
Staff Engineer, Design Verification Engineering • East Elliot, Chandler, AZ, US
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