Design Engineer III
ONSITE- US: TX- Austin OR Sunnyvale office (2nd option)
Salary 140 to 145K
Responsibilities
Perform comprehensive power analysis at various design stages, spanning from RTL to GDSII.
Contribute to the development, improvement, and automation of various power analysis flows. This includes gathering and analyzing large datasets for power modeling via automated processes.
Investigate and address power inefficiencies, providing actionable feedback to the RTL design team.
Minimum Qualifications
Demonstrated experience with RTL-to-GDSII design flow usage and development in advanced technology nodes (7nm and below).
Expertise in low-power implementation and signoff, including power gating, multiple voltage rails, and Unified Power Format (UPF) usage.
Proven experience in power analysis and reduction utilizing industry-standard tools such as PrimeTime PX/PrimePower.
Proficiency in scripting languages, with a strong emphasis on Python and ML/AI frameworks.
Working knowledge of RTL design principles.
Experience in RTL power optimization using specialized tools like Power-Artist.
Ability to learn quickly, explore new ideas, and iterate rapidly to achieve optimal results.
Preferred Qualifications
Experience with synthesis and Place and Route (PnR) flows.
Experience analyzing Intellectual Property (IP) design for power characteristics and building run-time estimation models for use by software/firmware teams.
Skills in data analysis and data modeling, including the application of machine learning approaches.
MUST HAVE
1. Power analysis and reduction (with industry tools)
2. RTL-to-GDSII flow and low-power implementation
3. Python scripting and ML/AI for automation and modeling
Education
• Must Have: Bachelor degree in Electrical/Computer Engineering or Computer Science
Design Engineer III • Austin, TX, US
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