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Consulting Engineer 3: 26-02765Akraya Inc. • CARLSBAD, CA, US
Consulting Engineer 3: 26-02765
Akraya Inc. • CARLSBAD, CA, US
2 days ago
Job type
- Full-time
- Quick Apply
Job description
Primary Skills: ASIC DFT (Expert), JTAG/Scan/BIST Architectures (Advanced) , ATPG & EDA Tools (Advanced), Post-Silicon Debug (Advanced), RTL Integration (Intermediate)
Contract Type: W2 Only
Duration: 12+ Months (Possible extension)
Location: Carlsbad, CA (Remote | PST hours)
Pay Range: $70-$75/hr on W2
Job Summary:
This is a critical contract opportunity for two lead-caliber ASIC DFT experienced engineers. You will play a pivotal role in designing and implementing advanced Design-for-Test (DFT) features for our cutting-edge silicon devices, powering next-generation network devices for advanced AI workloads. You will be instrumental in ensuring high-quality, testable, and manufacturable designs throughout the full product cycle, from pre-silicon design through post-silicon debug and production qualification.
Key Responsibilities:
- Implement hardware Design-for-Test (DFT) features including scan, Memory BIST (MBIST), Built-In Self-Test (BIST), and boundary scan.
- Set up and debug DFT simulations, and provide essential support for post-silicon testing and debug.
- Collaborate with multi-functional teams to develop innovative DFT Intellectual Property (IP) and integrate testability features at the RTL level.
- Create innovative hardware DFT and physical design aspects for new silicon device models (bare die & stacked die), driving reusable test and debug strategies.
- Independently craft solutions and debug complex issues with minimal mentorship.
Must-Have Skills:
- Bachelor's or Master's Degree in Electrical or Computer Engineering, with at least 8-10 years of relevant ASIC DFT experience.
- Proficient in JTAG protocols, Scan and BIST architectures (including Memory BIST), and integrating third-party IPs and high-speed digital/analog macros.
- Experience with ATPG (Automated Test Pattern Generation) and EDA tools such as Tessent tool sets, Xcelium, Genus, and Tempus/Primetime.
- At least one project with hands-on post-silicon debug of DFT patterns (scan, MBIST, boundary scan) and successful release to production.
- Ability to work independently and debug with minimal mentorship.
Industry Experience:
- Semiconductor Industry (ASIC Design)
- Experience in networking and photonic solutions is a plus.
ABOUT AKRAYA
Akraya is an award-winning IT staffing firm consistently recognized for our commitment to excellence and a thriving work environment. Most recently, we were recognized Stevie Employer of the Year 2025, SIA Best Staffing Firm to work for 2025, Inc 5000 Best Workspaces in US (2025 & 2024) and Glassdoor's Best Places to Work (2023 & 2022)!
Industry Leaders in Tech Staffing
As Talent solutions provider for Fortune 100 Organizations, Akraya's industry recognitions solidify our leadership position in the IT staffing space. We don't just connect you with great jobs, we connect you with a workplace that inspires!
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Consulting Engineer 3: 26-02765 • CARLSBAD, CA, US
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